Bulldozer

[REVENGE]

Sucks.

AMD on track to building 8 core Pentium 4s.

[MidKnight]

AMD/ATi's approach always seems to be to throw more power at the problem and hope it'll fix itself, but that hasn't worked since 2005.

Here's to hoping they get smart.

[aegis]

one of those sites said a bulldozer octo could easily hit 4.6GHz on air, a decent improvement over the phenom quad (especially considering turbo core)

[Das Bruce]

'could hit' is fine for people looking to overclock, but what percentage of users want that over solid stock performance?

[aegis]

imo you might see significant improvements on heavily-targeted apps versus the phenom X4 but most of the current benchmarks have been running on quads and hexcore versions of said quads.

I know with eight cores you lose the benefit of unganged memory on a quad (via one stick per core), but these tests are running with only two sticks anywho

from that review, the biggest issue is with single-threaded operations. with multithread, it'd float around the i5 2600k performance-wise.

sadly, it's probably a better idea to buy intel or a phenom II quad considering the bulldozer price point.

[Coresair]

Pathetic. Worse core performance than phenom II which was already YEARS behind intel. So what if there are 8 cores now? most people will never use 8 threads (even then, the performance increase is minimal compared to running HT on an i7 2600(k)). Half of those who DO use that many threads are better off/can afford the superior intel solutions.

Really, its just bad. I cannot even see it having a niche like phenom II did. Phenom II was atleast cheap and ran cool/ low power to make some very nice low-budget builds.

This BD is rubbish......Glad I decided to get sandybridge and not wait.

Edit: Its overclocking is ok I guess, but clock for clock still slower than sandy bridge which can overclock to 4.6-4.8ghz on average and use MUCH less power.

[jK]

Debatable architecture.

pro
* float32 to float16 hw-op
* modules instead of cores (really share silicon between cores)
* FMAD op
* AVX (better done than their SSE impl.?)

contra
* just 1 FPU per core/module (but 2 ALUs! WTF!?)
* FPU has 2x128bit but you can only send 1 cmd per cycle, so either AVX:1x256bit SSE:1x128bit or FPU:1x80bit
-> idle silicon in FPU mode ... wasted resources ...

unknown
* 8MB L2 + 8MB L3 cache ???????
* their Turbo Core func needs optimizations in the OS thread scheduler